oki semiconducto r fedr27t12800l-02-02 issue date: march 1, 2006 mr27t12800l 8m?word 16?bit or 16m?word 8?bit p2rom 1/9 features 8,388,608-word 16-bit / 16,777,216-word 8-bit electrically switchable configuration access time 2.7 v to 3.6 v power supply 100 ns max 3.0 v to 3.6 v power supply 90 ns max operating current 25 ma max(5mhz) standby current 10 a max input/output ttl compatible three-state output packages MR27T12800L-XXXTN 48-pin plastic tsop (tsop i 48-p-1220-0.50-1k) p2rom advanced technology p2rom stands for production programmed rom. this exclusive oki technology utilizes factory test equipment for programming the customers code into the p2rom prior to final production testing. advancements in this technology allows production costs to be equivalent to maskrom and has many advantages and added benefits over the other non-volatile technologies, which include the following; short lead time , since the p2rom is programmed at the final stage of the production process, a large p2rom inventory "bank system" of un-programmed packaged products are maintained to provide an aggressive lead-time and minimize liability as a custom product. no mask charge , since p2roms do not utilize a custom mask for storing customer code, no mask charges apply. no additional programming charge, unlike flash and otp that require additional programming and handling costs, the p2rom already has the code loaded at the factory with minimal effect on the production throughput. the cost is included in the unit price. custom marking is available at no additional charge. pin compatible with mask rom . pin configuration (top view) 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 byte # a16 a15 a14 a13 a12 a11 a10 a 9 a 8 a 19 a 21 a 20 a 18 a 17 a7 a6 a5 a4 a3 a2 a1 a0 ce # 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 48tsop(type-i) v ss v ss d15/a-1 d7 d14 d6 d13 d5 d12 d4 v cc v cc a22 d11 d3 d10 d2 d9 d1 d8 d0 oe# v ss v ss
fedr27t12800l-02-02 oki semiconductor mr27t12800l / p2rom 2/9 block diagram pin descriptions pin name functions d15 / a?1 data output / address input a0 to a22 address inputs d0 to d14 data outputs ce# chip enable input oe# output enable input byte# word / byte select input v cc power supply voltage v ss ground a 0 a1 a2 a3 a4 a5 a6 a7 a8 a9 a10 a11 a12 a13 a14 a15 a16 a17 a18 a19 a20 a21 a22 ce# byte# oe# ce oe 8/ 16 switch d0 d2 d4 d6 d8 d10 d12 d14 d1 d3 d5 d7 d9 d11 d13 d15 memory cell matrix 8m 16-bit or 16m 8-bit multiplexer output buffer row decoder column decoder address buffer in 8-bit output mode, these pins are placed in a high-z state and pin d15 functions as the a-1 address pin. a?1
fedr27t12800l-02-02 oki semiconductor mr27t12800l / p2rom 3/9 function table mode ce# oe# byte# v cc d0 to d7 d8 to d14 d15/a?1 read (16-bit) l l h d out read (8-bit) l l l d out hi?z l/h h output disable l h l hi?z ? h standby h ? l 2.7 v to 3.6 v hi?z ? ? : don?t care (h or l) absolute maximum ratings parameter symbol condition value unit operating temperature under bias ta 0 to 70 c storage temperature tstg ? ?55 to 125 c input voltage v i ?0.5 to v cc +0.5 v output voltage v o ?0.5 to v cc +0.5 v power supply voltage v cc relative to v ss ?0.5 to 5 v power dissipation per package p d ta = 25c 1.0 w output short circuit current i os ? 10 ma recommended operating conditions (ta = 0 to 70c) parameter symbol condition min. typ. max. unit v cc power supply voltage v cc 2.7 ? 3.6 v input ?h? level v ih 2.2 ? v cc +0.5 ? v input ?l? level v il v cc = 2.7 to 3.6 v ?0.5 ?? ? 0.6 v voltage is relative to v ss . ? : vcc+1.5v(max.) when pulse width of overshoot is less than 10ns. ?? : -1.5v(min.) when pulse width of undershoot is less than 10ns. pin capacitance (v cc = 3.0 v, ta = 25c, f = 1 mhz) parameter symbol condition min. typ. max. unit input c in1 ? ? 10 byte# c in2 v i = 0 v ? ? 200 output c out v o = 0 v ? ? 10 pf
fedr27t12800l-02-02 oki semiconductor mr27t12800l / p2rom 4/9 electrical characteristics dc characteristics (v cc = 2.7 v to 3.6 v, ta = 0 to 70c) parameter symbol condition min. typ. max. unit input leakage current i li v i = 0 to v cc ? ? 10 a output leakage current i lo v o = 0 to v cc ? ? 10 a i ccsc ce# = v cc ? ? 10 a v cc power supply current (standby) i ccst ce# = v ih ? ? 1 ma v cc power supply current (read) i cca ce# = v il , oe# = v ih f=5mhz ? ? 25 ma input ?h? level v ih ? 2.2 ? v cc +0.5 ? v input ?l? level v il ? ?0.5 ?? ? 0.6 v output ?h? level v oh i oh = ?1 ma 2.4 ? ? v output ?l? level v ol i ol = 2 ma ? ? 0.4 v voltage is relative to v ss . ? : vcc+1.5v(max.) when pulse width of overshoot is less than 10ns. ?? : -1.5v(min.) when pulse width of undershoot is less than 10ns.
fedr27t12800l-02-02 oki semiconductor mr27t12800l / p2rom 5/9 ac characteristics (v cc = 2.7 v to 3.6 v, ta = 0 to 70c) parameter symbol condition min. max. unit address cycle time t c ? 100 ? ns address access time t acc ce# = oe# = v il ? 100 ns ce# access time t ce oe# = v il ? 100 ns oe# access time t oe ce# = v il ? 30 ns t chz oe# = v il 0 20 ns output disable time t ohz ce# = v il 0 20 ns output hold time t oh ce# = oe# = v il 0 ? ns (v cc = 3.0 v to 3.6 v, ta = 0 to 70c) parameter symbol condition min. max. unit address cycle time t c ? 90 ? ns address access time t acc ce# = oe# = v il ? 90 ns ce# access time t ce oe# = v il ? 90 ns oe# access time t oe ce# = v il ? 30 ns t chz oe# = v il 0 20 ns output disable time t ohz ce# = v il 0 20 ns output hold time t oh ce# = oe# = v il 0 ? ns measurement conditions input signal level --------------------------------------0 v/3 v input timing refer ence level -------------------------1/2vcc output l oad ---------------------------------------------50 pf output timing reference level ------------------- 1/2vcc output load output 50 pf (including scope and jig)
fedr27t12800l-02-02 oki semiconductor mr27t12800l / p2rom 6/9 timing chart (read cyc l e) 8-bit read mode (byte# = v il ) a-1 to a22 ce# oe# d0 to d7 t c t ce t oe t oh t chz t ohz valid data hi-z hi-z t oh valid data t acc t c t acc 16-bit read mode (byte# = v ih ) a0 to a22 ce# oe# d0 to d15 t c t ce t oe t oh t chz t ohz valid data hi-z hi-z t oh valid data t acc t c t acc
fedr27t12800l-02-02 oki semiconductor mr27t12800l / p2rom 7/9 package dimensions tsop(1)48-p-1220-0.50-1k mirror finish package material epoxy resin lead frame material 42 alloy pin treatment solder plating ( 5m) package weight (g) 0.55 typ. 5 rev. no./last revised 1/dec. 2, 1999 notes for mounting the surface mount type package the surface mount type packages are very susceptible to heat in reflow mounting and humidity absorbed in storage. therefore, before you perform reflow mounting, contact oki?s responsible sales person for the product name, package name, pin number, package code and desired mounting conditions (reflow method, temperature and times). ( unit: mm )
fedr27t12800l-02-02 oki semiconductor mr27t12800l / p2rom 8/9 revision history page document no. date previous edition current edition description fedr27t12800l-02-01 jun. 13, 2005 ? ? final edition 1 fedr27t12800l-02-02 march 1,2006 1 1 added access time at v cc = 3.0 v to 3.6 v to features 4 5 added ac characteristics at v cc = 3.0 v to 3.6 v
fedr27t12800l-02-02 oki semiconductor mr27t12800l / p2rom 9/9 notice 1. the information contained herein can change without notice owing to product and/or technical improvements. before using the product, please make sure that the information being referred to is up-to-date. 2. the outline of action and examples for application circuits described herein have been chosen as an explanation for the standard action and performance of the product. when planning to use the product, please ensure that the external conditions are reflected in the actual circuit, assembly, and program designs. 3. when designing your product, please use our product below the specified maximum ratings and within the specified operating ranges including, but not limited to, operating voltage, power dissipation, and operating temperature. 4. oki assumes no responsibility or liability whatsoever for any failure or unusual or unexpected operation resulting from misuse, neglect, improper installation, repair, alteration or accident, improper handling, or unusual physical or electrical stress including, but not limited to, exposure to parameters beyond the specified maximum ratings or operation outside the specified operating range. 5. neither indemnity against nor license of a third party?s industrial and intellectual property right, etc. is granted by us in connection with the use of the product and/or the information and drawings contained herein. no responsibility is assumed by us for any infringement of a third party?s right which may result from the use thereof. 6. the products listed in this document are intended fo r use in general electronics equipment for commercial applications (e.g., office automation, communication equipment, measurement equipment, consumer electronics, etc.). these products are not, unless speci fically authorized by oki, authorized for use in any system or application that requires special or enha nced quality and reliability characteristics nor in any system or application where the failure of such system or application may result in the loss or damage of property, or death or injury to humans. such applications include, but are not limited to, tr affic and automotive equipment, safety devices, aerospace equipment, nuclear power control, medical equipment, and life-support systems. 7. certain products in this document may need government approval before they can be exported to particular countries. the purchaser assumes the responsibility of determining the legality of export of these products and will take appropriate and necessary steps at their own expense for these. 8. no part of the contents contained herein may be reprinted or reproduced without our prior permission. copyright 2005 oki electric industry co., ltd.
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